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Related articles:
DDR2 SDRAM
DDR SDRAM
Double data rate
CAS latency
DIMM
Fully Buffered DIMM
SO-DIMM
Dual-channel architecture
Serial presence detect
Prefetch buffer
Intel P35
DDR
Socket AM3
Key terms: sdram memory modules data clock transfer rate latency bandwidth standard mhz voltage jedec intel additional dimm mt device per higher ecc registered transfer rate ddr buffered frequency bits data rate specifications cas computing compared core bus earlier chips random access memory data transfer clock cycles transfer data maximum rising directly identified by an additional dynamic random access memory calibration notch errors memory clock interface byte processors designation mb double cas latency fully buffered Search external links cited by footnotes on Wikipedia page DDR3 SDRAM: |
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